Faster, Better Inspector Recipes By Catherine Perry-Sullivan, Ph.D.
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Cathy is a Product Marketing Manager at KLA-Tencor
Corporation, where she has specialized in applications
and marketing for wafer inspection products since 1996.
Semiconductor manufacturers rely on patterned wafer inspectors to help improve and monitor yield by detecting critical defects, yet today’s inspectors often do not achieve their full defect detection potential in a production environment. While these state-of-the-art inspectors have the capabilities needed to detect yield-limiting defects on advanced devices, they require a high quality ‘recipe’ to achieve their full sensitivity entitlement. A recipe sets the values of the inspector’s multiple optical and algorithm parameters. Each parameter must be properly tuned so that when the recipe is run, the inspector captures defects of interest (DOI) at a low nuisance rate. Fab time pressures and the absence of very high resolution images during recipe setup typically limit an engineer’s ability to fully tune the recipe, reducing the value of the inspection results. Engineers require a new, more efficient recipe creation toolset that produces higher quality inspector recipes. Such recipes would facilitate the generation of a truly actionable defect Pareto, helping fabs to resolve defect issues more rapidly and with greater accuracy.  Figure 1. Proprietary connectivity between the eDR-5200 review and classification system and KLA-Tencor optical inspectors enables a more efficient method of inspector recipe optimization by allowing the inspector recipe to be optimized on the eDR-5200 Creating the best inspection recipe requires not only an inspector that has high defect capture, but also a means to accurately distinguish the important defects from those that do not affect yield. At advanced design nodes, a high resolution SEM (scanning electron microscope) image is required to correctly classify a defect as nuisance or DOI. With a well classified defect set, the engineer can properly adjust recipe parameters to maximize DOI capture and reduce nuisance defects. Thus, the conventional recipe optimization method involves creating an initial recipe on the inspector, scanning a set of wafers, classifying a sample of captured defects on the SEM tool, and using the results to adjust the recipe parameters on the inspector. This process is repeated, moving the wafers back and forth between the inspector and review tool, until an adequate inspection recipe is obtained or until the time budget runs out. This method of recipe optimization is time consuming, especially considering wafer transport and queue times — and also reduces the amount of inspector tool time spent on excursion and yield monitoring.  Figure 2. Data from four different layers demonstrating the improved recipe quality achieved using the new recipe optimization methodology (RICO). By using RICO to optimize the recipes, the number of nuisance defects is significantly reduced. A new SEM defect review and classification system with proprietary connectivity to compatible optical inspectors is now available, helping engineers generate higher quality recipes in a shorter time. The new toolset allows the inspector’s recipe to be set up and optimized on the SEM review tool. This “first-time right” method eliminates the need to move wafers back and forth between systems multiple times, and typically reduces recipe setup time by 50%. It increases overall equipment efficiency by utilizing the lower cost of ownership SEM tool for recipe development and freeing the inspector for additional inspections. Moreover, the use of the SEM review tool for inspector recipe development is efficient, granting engineers the time required to fully optimize the recipe. This produces a greater number of actionable defect Paretos per hour, enabling faster resolution of defect issues, and ultimately, faster time to yield. Click here to learn more about recipe cycle optimization |
